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What is it

An implementation of the Acorn 32016 Second Processor for hardware development boards.

It can run at any integer clock speed (except on the DE0 Nano), with maxima between 50 and 150 MHz (depending on the development board). The actual performance level is roughly six times the clock speed (because the 32016 core that is used has an integrated cache and executes many instructions in far fewer cycles than a real 32016). Refer to the documentation for more details.

The supported development boards are :

• Terasic DE0 Nano
• Terasic Cyclone V GX Starter Kit
• Altera Stratix III FPGA Development Kit
• Altera Stratix V Advanced Systems Development Kit
• Terasic DE10 Nano
• Terasic Cyclone 10 LP Evaluation Kit

For more information, read the online documentation or download the whole thing (see below).

Use it

Ingredients :

• Your Acorn computer with Tube interface
• A supported development board (see above)
• My uploadable hardware design (see below)
• One or two (sliced up) flatcables (see instructions)
• A TubeSilencer

Downloads (click to download, unpack, and read the ReadMe.txt file first) :

• Release 07 Feb 2021 (all development boards)